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Topic 10 of 13

Registers

Groups of flip-flops that store and move data: parallel load, shift registers and register transfer.

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Before we start

Why this matters

How do those scrolling LED signs, or a string of slightly-too-enthusiastic Christmas lights, shuffle their pattern one step over, forever?

A shift register: a conga line of flip-flops, each one passing its bit to the next on every beat, with no one allowed to skip ahead. It's also, quite literally, how your CPU shuffles a byte of data from one corner of the chip to another. Let's get the conga line moving.

Outline

Topics in this chapter

Select a topic to jump to the slide that explains it.

  1. Register structure
  2. Clock, clear, load, and enable
  3. Load, clear, hold, shift, and transfer
  4. Parallel load
  5. SISO
  6. SIPO
  7. PISO
  8. PIPO
  9. Bidirectional shift registers
  10. Universal shift registers
  11. Register Transfer Language (RTL)
  12. Registers vs. memory
  13. CPU register files

Concept 1 of 4

Register structure and control

An n-bit register is n flip-flops sharing a clock, each storing one bit. Common controls: clear (force 0), load (accept new data), enable (allow change). With load = 1 the register accepts data on the next clock edge, and with load = 0 it holds. Operations: load, clear, hold, shift, transfer. In parallel load all bits enter in the same clock cycle.

Explore furtherInside the Computer74LS273 chip (octal register)Inside the Computer74LS373 chip (octal latch)Gate Forge4-bit RegisterProblems › Computer Building Blocks

Concept 2 of 4

Shift registers

A shift register moves its bits one place per clock. Shift left moves bits toward the MSB and a new bit enters at the right. Shift right moves toward the LSB and a new bit enters at the left. The four styles:

TypeInOutUse
SISOSerialSerialDelay lines
SIPOSerialParallelSerial to parallel conversion
PISOParallelSerialParallel to serial conversion
PIPOParallelParallelStorage, buffering

A bidirectional register shifts either way under a direction control. A universal shift register supports hold, shift left, shift right and parallel load, usually with a 4-to-1 MUX at each flip-flop input.

Explore furtherInside the Computer74LS194 chip (shift register)Inside the ComputerShifterGate Forge4-bit Shift Left (Logical)Problems › ShiftersGate Forge4-bit Rotate RightProblems › Shifters

Concept 2 of 4

Shift registers (cont.)

Serial InD FF0D   QQ0D FF1D   QQ1D FF2D   QQ2D FF3D   QQ3Clock
A 4-bit SIPO shift register: one Clock line (orange) drives every flip-flop, each Q feeds the next D, and every Q is also tapped out separately as Q0–Q3 — all four bits available at once, which is what makes the output “parallel.”

Interactive circuit

4-bit shift register (serial in, parallel out)

Click the switches to change the inputs and watch the LEDs. Use “Show truth table” when it appears.

Interactive circuit

4-bit shift register (serial in, parallel out) (cont.)

Concept 3 of 4

Register transfer language

RTL describes data movement between registers. R2 ← R1 copies R1 into R2. R1 ← R1 + 1 increments. R3 ← R1 AND R2 stores a logic result. A control condition can guard a transfer: P: R2 ← R1 happens only when P = 1.

Explore furtherInside the Computer74LS245 chip (bus transceiver)Inside the ComputerBus interface

Concept 4 of 4

Registers in CPUs

CPUs use registers for operands, addresses, instructions and status: general-purpose registers, the program counter, the instruction register and the status register. A register file holds several registers, and selected ones feed the ALU. Registers are very fast and small. Main memory has more capacity and is slower.

Explore furtherInside the ComputerRegistersInside the ComputerALU operand registersInside the ComputerIntel 8086 simulator

Truth tables

Truth tables

4-bit shift right, serial in 1 0 1 1

ClockSerial inQ3Q2Q1Q0
0–0000
111000
200100
311010
411101

Register operations

ClearLoadShiftOperation
1XXClear to 0
01XParallel load
001Shift
000Hold

Four shift-register types

TypeData inData out
SISOserialserial
SIPOserialparallel
PISOparallelserial
PIPOparallelparallel

Interactive

Demo: shift registers and register transfer

Worked example 1 of 2

Worked example 1

Start with 0000 and shift right, entering the serial bits 1, 0, 1, 1. What is the final content?
Show the solution
  1. Shift in 1: 1000
  2. Shift in 0: 0100
  3. Shift in 1: 1010
  4. Shift in 1: 1101

Worked example 2 of 2

Worked example 2

How many clock pulses are needed to load an 8-bit value serially?
Show the solution
8 pulses, one per bit.

Practice

Practice (1 of 2)

Try each one on paper first, then check your answer.

1. Design a 4-bit SISO register.
Show the answer
Four D flip-flops in a chain: Q of each feeds D of the next, one common clock. Try the shift register circuit.
2. Explain SIPO and PISO.
Show the answer
SIPO takes serial data in and presents all bits in parallel. PISO loads all bits in parallel and shifts them out serially.
3. What is the purpose of Load?
Show the answer
Load = 1 accepts new data at the clock edge. Load = 0 keeps the current value.

Practice

Practice (2 of 2)

Try each one on paper first, then check your answer.

4. Demonstrate four right shifts.
Show the answer
See the example above, or use the simulator.
5. Write RTL for register transfers.
Show the answer
R2 ← R1, R1 ← R1 + 1, R3 ← R1 AND R2.
Practice in Gate Forge

Chain D flip-flops into a 4-bit shift register driven by one Clock.

Open Gate ForgeGate ForgeA free circuit simulator — place and wire gates, generate truth tables and timing diagrams, and work through 90+ guided problems.

Check yourself

Quiz

Summary

Summary

  • A register is n flip-flops with a shared clock.
  • Controls: clear, load, enable. Load = 0 means hold.
  • SISO, SIPO, PISO, PIPO describe serial or parallel in and out.
  • RTL: R2 ← R1 copies a register.
  • Registers are fast and small compared with memory.
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